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Transistor Scaling: Volume 913: Methods, Materials and Modeling

Hardback

Main Details

Title Transistor Scaling: Volume 913: Methods, Materials and Modeling
Authors and Contributors      Edited by Scott Thompson
Edited by Faran Nouri
Edited by Wen-Chin Lee
Edited by Wilman Tsai
SeriesMRS Proceedings
Physical Properties
Format:Hardback
Pages:205
Category/GenreMaterials science
ISBN/Barcode 9781558998698
ClassificationsDewey:621.381528
Audience
Professional & Vocational
Illustrations Worked examples or Exercises

Publishing Details

Publisher Materials Research Society
Imprint Materials Research Society
Publication Date 7 November 2006
Publication Country United States

Description

For the past four decades, geometric scaling of silicon CMOS transistors has enabled not only an exponential increase in circuit integration density - Moore's Law - but also a corresponding enhancement in the transistor performance. Simple MOSFET geometric scaling has driven the industry to date. However, as the transistor gate lengths drop below 35nm and the gate oxide thickness is reduced to 1nm, physical limitations such as off-state leakage current and power density make geometric scaling an increasingly challenging task. In order to continue CMOS device scaling, innovations in device structures and materials are required and the industry needs a new scaling vector. Starting at the 90 and 65nm technology generation, strained silicon has emerged as one such innovation. Other device structures such as multigate FETs may be introduced to meet the scaling challenge. This book shares results and physical models related to MOSFETs and to discuss innovative approaches necessary to continue the transistor scaling. Expanded versions of presentations in the areas of technology development are featured