Advanced Model Order Reduction Techniques in VLSI Design

Description

Model order reduction (MOR) techniques reduce the complexity of VLSI designs, paving the way to higher operating speeds and smaller feature sizes. This book presents a systematic introduction to, and treatment of, the key MOR methods employed in general linear circuits, using real-world examples to illustrate the advantages and disadvantages of each algorithm. Following a review of traditional projection-based techniques, coverage progresses to more advanced MOR methods for VLSI design, including HMOR, passive truncated balanced realization (TBR) methods, efficient inductance modeling via the VPEC model, and structure-preserving MOR techniques. Where possible, numerical methods are approached from the CAD engineer's perspective, avoiding complex mathematics and allowing the reader to take on real design problems and develop more effective tools. With practical examples and over 100 illustrations, this book is suitable for researchers and graduate students of electrical and computer engineering, as well as practitioners working in the VLSI design industry.

Sheldon X.-D. Tan is an associate professor in the Department of Electrical Engineering, and cooperative faculty member in the Department of Computer Science and Engineering, at the University of California, Riverside. He received his PhD in electrical and computer engineering in 1999 from the University of Iowa, Iowa City. His current research interests focus on design automation for VLSI integrated circuits. Lei He is an associate professor in the Department of Electrical Engineering at the University of California, Los Angeles, where he was also awarded his PhD in computer science in 1999. His current research interests include computer-aided design of VLSI circuits and systems.